STI shape near fin bottom of Si fin in bulk FinFET
US9953885B2 · kind B2 · utility
24Cited by
29References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2010 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | Mar 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit structure includes providing a semiconductor substrate including a top surface; forming a first insulation region and a second insulation region in the semiconductor substrate; and recessing the first insulation region and the second insulation region. Top surfaces of remaining portions of the first insulation region and the second insulation region are flat surfaces or divot surfaces. A portion of the semiconductor substrate between and adjoining removed portions of the first insulation region and the second insulation region forms a fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.