Measuring individual layer thickness during multi-layer deposition semiconductor processing
US9953887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2016 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | May 9, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In situ wafer metrology is conducted to reliably obtain deposition thickness for each successive layer in a multi-layer deposition. A wafer to be processed is positioned in a processing station of a deposition process tool, the process tool having a reflectometer metrology apparatus for optically determining thickness of a deposited layer on the wafer. Prior to commencing a deposition, the wafer is aligned in the processing station such that an optical metrology spot generated by the reflectometer metrology apparatus will align with an unpatterned central region of a die on a wafer during a deposition conducted on the wafer in the tool. Thereafter, the thickness of a deposited layer on the wafer is reliably measured and monitored in situ.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.