Iterative method and apparatus to program a programmable resistance memory element using stabilizing pulses
US9959928B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2016 |
| Grant date | May 1, 2018 |
| Priority date | — |
| Expiry date | Dec 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to program a programmable resistance memory cell includes performing one or more iterations until a verifying passes. The iterations include a) applying a programming pulse to the memory cell, and, b) after applying the programming pulse, verifying if the resistance of the memory cell is in a target resistance range. After an iteration of the one or more iterations in which the verifying passes, c) a stabilizing pulse with a polarity the same as the programming pulse is applied to the memory cell. After applying the stabilizing pulse, a second verifying determines if the resistance of the programmable element is in the target resistance range. Iterations comprising steps a), b), c), and d) are performed until the second verifying passes. Methods and apparatus are described to program a plurality of such cells, including applying a stabilizing pulse of the same polarity after programming.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.