Resistive random-access memory structure and method for fabricating the same
US9960349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2017 |
| Grant date | May 1, 2018 |
| Priority date | — |
| Expiry date | Mar 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A resistive random-access memory structure and a method for fabricating a resistive random-access memory structure are described. A first dielectric layer is formed on a substrate. A plurality of bottom electrodes are independently embedded in the first dielectric layer. A transition metal oxide layer covers the plurality of bottom electrodes and extends onto a portion of the first dielectric layer. The minimum distance between the bottom electrode and a sidewall of the transition metal oxide layer is a first distance. The first distance is in a range of 10 nm to 200 μm. A top electrode is formed on the transition metal oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.