Patent · US Active

Apparatuses and methods for asymmetric input/output interface for a memory

US9965408B2 · kind B2 · utility

2Cited by
8References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 14, 2015
Grant dateMay 8, 2018
Priority date
Expiry dateMar 21, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4068
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Apparatuses and methods for asymmetric input/output interfaces for memory are disclosed. An example apparatus may include a receiver and a transmitter. The receiver may be configured to receive first data signals having a first voltage swing and having a first slew rate. The transmitter may be configured to provide second data signals having a second voltage swing and having a second slew rate, wherein the first and second voltage swings are different, and wherein the first and second slew rates are different.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.