Patent · US Active

Semiconductor chip package comprising side wall marking

US9972576B2 · kind B2 · utility

0Cited by

9References

16Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Ralf Otremba · Kaufbeuren, DE
Teck Sim Lee · Melaka City, MY
Amirul Afiq Hud · Melaka City, MY
Fabian Schnoy · Regenstauf, DE
Felix Grawert · Cambridge, US
Uwe Kirchner · Feldkirchen in Kärnten, AT
Bernd Schmoelzer · Radenthein, AT
Franz Stueckler · Friesach, AT

Key dates

Filing date	Nov 24, 2016
Grant date	May 15, 2018
Priority date	—
Expiry date	Nov 24, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The semiconductor chip package comprises a semiconductor chip, and an encapsulation body encapsulating the semiconductor chip, wherein the encapsulation body comprises a semiconductor chip; an encapsulation body encapsulating the semiconductor chip, wherein the encapsulation body comprises two opposing main faces and side faces which connect the two main faces with each other, wherein the side face have a smaller surface area than the main faces, respectively, and wherein a marking is provided on at least one of the side faces.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.