Semiconductor device comprising a floating gate flash memory device
US9972634B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2016 |
| Grant date | May 15, 2018 |
| Priority date | — |
| Expiry date | Aug 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D87/00
Abstract
A method of manufacturing a semiconductor device is provided including providing a silicon-on-insulator (SOI) substrate comprising a semiconductor bulk substrate, a buried insulation layer formed on the semiconductor bulk substrate and a semiconductor layer formed on the buried insulation layer, forming a first transistor device on and in the SOI substrate in a logic area of the SOI substrate, removing the semiconductor layer and the buried insulation layer from a memory area of the SOI substrate, forming a dielectric layer on the exposed semiconductor bulk substrate, forming a floating gate layer on the first dielectric layer, forming an insulating layer on the floating gate layer and forming a control gate layer on the insulating layer, wherein an upper surface of the floating gate layer is substantially at the same height level as an upper surface of the semiconductor layer remaining in the logic area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.