Semiconductor memory device
US9978441B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2017 |
| Grant date | May 22, 2018 |
| Priority date | — |
| Expiry date | Feb 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/31
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes a memory cell, a sense amplifier, a first transfer transistor, a second transfer transistor, and a controller. The memory cell can store a first value and a second value. The sense amplifier amplifies the first value or the second value read from the memory cell to the sense node. The first transfer transistor has a first control terminal connected to the sense node. The second transfer transistor has a second control terminal connected to the sense node. The controller applies a backgate potential to backgate terminals of the first transfer transistor and the second transfer transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.