Lateral MOSFET with buried drain extension layer
US9985095B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2016 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Jun 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit containing an extended drain MOS transistor which has a drift layer, an upper RESURF layer over and contacting an upper surface of the drift layer, and a buried drain extension below the drift layer which is electrically connected to the drift layer at the drain end and separated from the drift layer at the channel end. A lower RESURF layer may be formed between the drift layer and the buried drain extension at the channel end. Any of the upper RESURF layer, the drift layer, the lower RESURF layer and the buried drain extension may have a graded doping density from the drain end to the channel end. A process of forming an integrated circuit containing an extended drain MOS transistor which has the drift layer, the upper RESURF layer, and the buried drain extension.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.