Method of fabricating integrated structure for MEMS device and semiconductor device
US9988264B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2014 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Jan 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.