Patent · US Active

Process window optimizer

US9990451B2 · kind B2 · utility

6Cited by

3References

20Claims

0Family size

Assignee

ASML NETHERLANDS B.V. · NL

Inventors

Stefan Hunsche · Santa Clara, US
Venu Vellanki · San Jose, US

Key dates

Filing date	Feb 9, 2015
Grant date	Jun 5, 2018
Priority date	—
Expiry date	Feb 25, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH01L22/20
WIPO fieldOptics
WIPO sectorInstruments

Abstract

Disclosed herein is a computer-implemented defect prediction method for a device manufacturing process involving processing a pattern onto a substrate, the method comprising: identifying a processing window limiting pattern (PWLP) from the pattern; determining a processing parameter under which the PWLP is processed; and determining or predicting, using the processing parameter, existence, probability of existence, a characteristic, or a combination thereof, of a defect produced from the PWLP with the device manufacturing process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.