Patent · US Active

Write assist circuitry

US9997217B1 · kind B1 · utility

2Cited by

0References

20Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Ankur Goel · Bengaluru, IN
Munish Kumar · Sindhar, IN
Nitin Jindal · Noida, IN
Rahul Mathur · Austin, US
Shruti Aggarwal · Noida, IN
Bikas Maiti · Austin, US
Yew Keong Chong · Austin, US

Key dates

Filing date	Apr 3, 2017
Grant date	Jun 12, 2018
Priority date	—
Expiry date	Apr 3, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/419
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are directed to an integrated circuit having core circuitry with an array of memory cells arranged in columns. The integrated circuit may include write assist circuitry having a column selector that accesses the memory cells via a bitline coupled to each of the columns. The write assist circuitry may include a first node that couples the column selector to a discharge circuit and a feedback circuit. The write assist circuitry may include a second node that couples a trigger circuit to the discharge circuit and the feedback circuit. The trigger circuit enables the discharge circuit, discharges the second node, and is disabled after discharging the second node. The discharge circuit discharges the first node, and the feedback circuit tracks the first node and disables the discharge circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.