Memory module with dynamic stripe width
US9997233B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2016 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Oct 5, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a memory module having a buffer component, a plurality of data signaling paths and a plurality of memory dies each coupled to a respective one of the data signaling paths, the buffer component receives and stores a first configuration value that specifies a memory-die quantity N, where N is permitted to range from a first value corresponding to the quantity of the data signaling paths to at least one value less than the first value. The buffer component further receives a memory read command and enables, in accordance with the first configuration value, a quantity N of the memory dies to output read data in response to the memory read command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.