Semiconductor device with transistor cells and enhancement cells with delayed control signals
US9997602B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2015 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Mar 31, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/84
Abstract
A semiconductor device includes transistor cells and enhancement cells. Each transistor cell includes a body zone that forms a first pn junction with a drift structure. The transistor cells may form, in the body zones, inversion channels when a first control signal exceeds a first threshold. The inversion channels form part of a connection between the drift structure and a first load electrode. A delay unit generates a second control signal which trailing edge is delayed with respect to a trailing edge of the first control signal. The enhancement cells form inversion layers in the drift structure when the second control signal falls below a second threshold lower than the first threshold. The inversion layers are effective as minority charge carrier emitters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.