Semiconductor memory device with recessed array region
USRE38296E1 · kind E1 · reissue
12Cited by
7References
44Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 23, 1995 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Mar 23, 2015 |
Classification
- Technology area (CPC —)General
Abstract
A semiconductor memory wherein a memory cell region having a plurality of memory cells and a relatively high altitude above the surface of semiconductor substrate is formed at a recessed part of the semiconductor substrate having the recessed part and a projected part, and wherein a peripheral circuit region having a comparatively low altitude from the surface of the semiconductor substrate is formed at the projected part of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.