Stackable chip package with flex carrier
USRE41039E1 · kind E1 · reissue
Assignee
Inventor
Key dates
| Filing date | Oct 26, 2004 |
| Grant date | Dec 15, 2009 |
| Priority date | — |
| Expiry date | Oct 26, 2024 |
Classification
- Technology area (CPC —)General
Abstract
A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.