System-on-chip with master/slave debug interface

USRE46021E1 · kind E1 · reissue

Assignee

• Infineon Technologies AG · DE

Inventor

• Albrecht Mayer · Deisenhofen, DE

Key dates

• Filing date: Feb 25, 2013
• Grant date: May 31, 2016
• Expiry date: Feb 25, 2033

Classification

• Technology area (CPC —): General

Abstract

A System-on-Chip (SOC) debugging system comprising a plurality of SOCs connected to a shared bus, at least one of the plurality of SOCs being a master SOC and comprising a master/slave debug interface, wherein the master/slave debug interface is a bidirectional debug interface configured to initiate transactions on the shared bus and operable to send and receive debug data between the SOCs, wherein the debug data comprises trace data.