Copper electrodeposition in microelectronics
USRE49202E1 · kind E1 · reissue
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2018 |
| Grant date | Sep 6, 2022 |
| Priority date | — |
| Expiry date | Jul 9, 2038 |
Classification
- Technology area (CPC —)General
Abstract
An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves superfilling by rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is substantially greater than Cu deposition on the side walls.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.