S-MOS Systems, Inc.
6Patents
0Active
6Granted
28Portfolio score
Filing activity: Sep 26, 1990 → Jun 12, 1992
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5079614A | Gate array architecture with basic cell interleaved gate electrodes | Electricity | 126 | Expired |
| US5214320A | System and method for reducing ground bounce in integrated circuit output buffers | Electricity | 44 | Expired |
| US5261106A | Semaphore bypass | Physics | 25 | Expired |
| US5345394A | Method for generating power slits | Electricity | 10 | Expired |
| US5297287A | System and method for resetting a microprocessor system | Physics | 9 | Expired |
| US5251164A | Low-power area-efficient absolute value arithmetic unit | Physics | 9 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.