Andreas Hellmich
4Patents
2h-index
11Co-inventors
41Inventor score
Filing activity: Nov 14, 2006 → Mar 3, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7381622B2 | Method for forming embedded strained drain/source regions based on a combined spacer and cavity etch process | Electricity | 5 | Active |
| US9514942B1 | Method of forming a gate mask for fabricating a structure of gate lines | Electricity | 4 | Active |
| US8524591B2 | Maintaining integrity of a high-K gate stack by passivation using an oxygen plasma | Electricity | 2 | Active |
| US8728924B2 | Gate electrodes of a semiconductor device formed by a hard mask and double exposure in combination with a shrink spacer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.