Ashutosh Anand
5Patents
1h-index
22Co-inventors
47Inventor score
Filing activity: Jun 21, 2012 → Sep 20, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9711241B2 | Method and apparatus for optimized memory test status detection and debug | Physics | 1 | Active |
| US9971663B2 | Method and apparatus for multiple memory shared collar architecture | Physics | 0 | Active |
| US9972402B2 | Continuous write and read operations for memories with latencies | Physics | 0 | Active |
| US12432222B2 | Systems and methods for spam blocking using artificial intelligence in a tiered software framework | Physics | 0 | Active |
| US8645779B2 | Scan testing of integrated circuits and on-chip modules | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.