Bernhard Korte
4Patents
2h-index
12Co-inventors
41Inventor score
Filing activity: Feb 28, 1997 → Feb 18, 2008
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6904584B2 | Method and system for placing logic nodes based on an estimated wiring congestion | Physics | 10 | Expired |
| US7844931B2 | Method and computer system for optimizing the signal time behavior of an electronic circuit design | Physics | 4 | Active |
| US6043436A | Wiring structure having rotated wiring layers | Electricity | 2 | Expired |
| US7886245B2 | Structure for optimizing the signal time behavior of an electronic circuit design | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.