Blaine Stackhouse
7Patents
4h-index
10Co-inventors
50Inventor score
Filing activity: Sep 30, 1996 → Jun 10, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6728823B1 | Cache connection with bypassing feature | Physics | 37 | Expired |
| US7992017B2 | Methods and apparatuses for reducing step loads of processors | Physics | 26 | Active |
| US5740000A | ESD protection system for an integrated circuit with multiple power supply networks | Electricity | 16 | Expired |
| US8479029B2 | Methods and apparatuses for reducing step loads of processors | Physics | 11 | Active |
| US7133319B2 | Programmable weak write test mode (PWWTM) bias generation having logic high output default mode | Physics | 2 | Expired |
| US8886979B2 | Methods and apparatuses for reducing step loads of processors | Physics | 1 | Active |
| US6185148A | General purpose decode implementation for multiported memory array circuits | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.