Carlos Dangelo
36Patents
28h-index
26Co-inventors
81Inventor score
Filing activity: Apr 6, 1990 → Jul 22, 2008
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5801958A | Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information | Physics | 323 | Expired |
| US5946487A | Object-oriented multi-media architecture | Electricity | 263 | Expired |
| US5544067A | Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation | Physics | 253 | Expired |
| US5555201A | Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information | Physics | 225 | Expired |
| US6216252A | Method and system for creating, validating, and scaling structural description of electronic device | Physics | 214 | Expired |
| US5933356A | Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models | Physics | 183 | Expired |
| US5541849A | Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including estimation and comparison of timing parameters | Physics | 181 | Expired |
| US6324678A | Method and system for creating and validating low level description of electronic design | Physics | 160 | Expired |
| US5870308A | Method and system for creating and validating low-level description of electronic design | Physics | 151 | Expired |
| US6470482B1 | METHOD AND SYSTEM FOR CREATING, DERIVING AND VALIDATING STRUCTURAL DESCRIPTION OF ELECTRONIC SYSTEM FROM HIGHER LEVEL, BEHAVIOR-ORIENTED DESCRIPTION, INCLUDING INTERACTIVE SCHEMATIC DESIGN AND SIMULATION | Physics | 138 | Expired |
| US5572437A | Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models | Physics | 115 | Expired |
| US5493508A | Specification and design of complex digital systems | Physics | 113 | Expired |
| US5553002A | Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, using milestone matrix incorporated into user-interface | Physics | 112 | Expired |
| US5442282A | Testing and exercising individual, unsingulated dies on a wafer | Physics | 110 | Expired |
| US5222030A | Methodology for deriving executable low-level structural descriptions and valid physical implementations of circuits and systems from high-level semantic specifications and descriptions thereof | Physics | 109 | Expired |
| US5389556A | Individually powering-up unsingulated dies on a wafer | Emerging Cross-Sectional Technologies | 97 | Expired |
| US5598344A | Method and system for creating, validating, and scaling structural description of electronic device | Physics | 90 | Expired |
| US5648661A | Integrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the dies | Electricity | 85 | Expired |
| US5544066A | Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including estimation and comparison of low-level design constraints | Physics | 84 | Expired |
| US5838163A | Testing and exercising individual, unsingulated dies on a wafer | Physics | 82 | Expired |
| US5665989A | Programmable microsystems in silicon | Electricity | 74 | Expired |
| US5910897A | Specification and design of complex digital systems | Physics | 69 | Expired |
| US5539325A | Testing and exercising individual, unsingulated dies on a wafer | Physics | 68 | Expired |
| US5557531A | Method and system for creating and validating low level structural description of electronic design from higher level, behavior-oriented description, including estimating power dissipation of physical implementation | Physics | 62 | Expired |
| US5572436A | Method and system for creating and validating low level description of electronic design | Physics | 61 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.