Inventor · Noida, IN

Deepak Kumar Bihani

5Patents
1h-index
8Co-inventors
33Inventor score

Filing activity: Feb 8, 2018 → Apr 5, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US10998077B2 Testing of comparators within a memory safety logic circuit using a fault enable generation circuit within the memory Physics 2 Active
US11742045B2 Testing of comparators within a memory safety logic circuit using a fault enable generation circuit within the memory Physics 1 Active
US11025252B2 Circuit for detection of single bit upsets in generation of internal clock for memory Electricity 0 Active
US10277207B1 Low voltage, master-slave flip-flop Physics 0 Active
US10637447B2 Low voltage, master-slave flip-flop Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.