Dojun Rhee
12Patents
10h-index
6Co-inventors
57Inventor score
Filing activity: Aug 22, 1996 → Nov 27, 2001
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6269129A | 64/256 quadrature amplitude modulation trellis coded modulation decoder | Electricity | 41 | Expired |
| US6201563A | Trellis code modulation decoder structure for advanced digital television receiver | Electricity | 38 | Expired |
| US6854082B1 | Unequal error protection Reed-Muller code generator and decoder | Electricity | 35 | Expired |
| US5812603A | Digital receiver using a concatenated decoder with error and erasure correction | Electricity | 30 | Expired |
| US5708665A | Digital receiver using equalization and block decoding with erasure and error correction | Electricity | 24 | Expired |
| US6807238B1 | Method and apparatus for decoding M-PSK turbo code using new approximation technique | Electricity | 23 | Expired |
| US6233712A | Apparatus and method for recovering information bits from a 64/256-quadrature amplitude modulation treliss coded modulation decoder | Electricity | 22 | Expired |
| US5781569A | Differential trellis decoding for convolutional codes | Electricity | 18 | Expired |
| US6987543B1 | System to efficiently transmit two HDTV channels over satellite using turbo coded 8PSK modulation for DSS compliant receivers | Electricity | 12 | Expired |
| US6421400B1 | System and method using polar coordinate representation for quantization and distance metric determination in an M-PSK demodulator | Electricity | 11 | Expired |
| US5926489A | Non-equalized digital receiver using block decoding with erasure and error correction | Electricity | 9 | Expired |
| US6349117B1 | Recursive decoder architecture for binary block codes | Electricity | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.