Inventor · Hillsboro, OR, US

Eileen Riggs

4Patents
4h-index
6Co-inventors
36Inventor score

Filing activity: Jun 14, 1988 → Jan 30, 1992

Most-cited inventions

PatentTitleAreaCited byStatus
US5345576A Microprocessor simultaneously issues an access to an external cache over an external cache bus and to an internal cache, cancels the external cache access on an internal cache hit, and reissues the access over a main memory bus on an external cache miss Physics 48 Expired
US5050066A Apparatus with a single memory and a plurality of queue counters for queuing requests and replies on a pipelined packet bus Physics 42 Expired
US5276690A Apparatus utilizing dual compare logic for self checking of functional redundancy check (FRC) logic Physics 37 Expired
US4903270A Apparatus for self checking of functional redundancy check (FRC) logic Physics 26 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.