Greg Mathews
8Patents
2h-index
7Co-inventors
44Inventor score
Filing activity: Jun 28, 2000 → Jul 24, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6728800B1 | Efficient performance based scheduling mechanism for handling multiple TLB operations | Physics | 138 | Expired |
| US6675266B2 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Physics | 5 | Expired |
| US6904502B2 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Physics | 2 | Expired |
| US8090869B2 | Priority-biased exit queue arbitration with fairness | Electricity | 2 | Active |
| US6775746B2 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Physics | 2 | Expired |
| US7315920B2 | Circuit and method for protecting vector tags in high performance microprocessors | Physics | 1 | Expired |
| US6839814B2 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Physics | 0 | Expired |
| USD1091349S1 | Modular scale | General | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.