Harsh Kumar
12Patents
6h-index
19Co-inventors
63Inventor score
Filing activity: May 5, 1995 → Mar 7, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6247094A | Cache memory architecture with on-chip tag array and off-chip data array | Physics | 81 | Expired |
| US6332189A | Branch prediction architecture | Physics | 67 | Expired |
| US6237064A | Cache memory with reduced latency | Physics | 33 | Expired |
| US6848070B1 | Error correcting code scheme | Electricity | 23 | Expired |
| US11108629B1 | Dynamic configuration of a cluster network in a virtualized computing system | Electricity | 23 | Active |
| US5627788A | Memory unit with bit line discharger | Physics | 9 | Expired |
| US7219217B1 | Apparatus and method for branch prediction utilizing a predictor combination in parallel with a global predictor | Physics | 4 | Expired |
| US11262953B2 | Image file optimizations by opportunistic sharing | Physics | 3 | Active |
| US11809751B2 | Image file optimizations by opportunistic sharing | Physics | 1 | Active |
| US11144401B2 | Component aware incremental backup, restore, and reconciliation solution | Physics | 0 | Active |
| US12411761B1 | Fully cache coherent virtual partitions in multitenant configurations in a multiprocessor system | Physics | 0 | Active |
| US11876671B2 | Dynamic configuration of a cluster network in a virtualized computing system | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.