James E. Vasek
5Patents
4h-index
16Co-inventors
43Inventor score
Filing activity: Feb 13, 2004 → Jul 19, 2006
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8175737B2 | Method and apparatus for designing and integrated circuit | Physics | 57 | Active |
| US7670760B2 | Treatment for reduction of line edge roughness | Physics | 5 | Active |
| US7276406B2 | Transistor structure with dual trench for optimized stress effect and method therefor | Electricity | 5 | Expired |
| US7157377B2 | Method of making a semiconductor device using treated photoresist | Emerging Cross-Sectional Technologies | 4 | Expired |
| US7288447B2 | Semiconductor device having trench isolation for differential stress and method therefor | Electricity | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.