Janet L. Olson
10Patents
6h-index
9Co-inventors
59Inventor score
Filing activity: Oct 29, 1996 → Feb 28, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5903476A | Three-dimensional power modeling table having dual output capacitance indices | Emerging Cross-Sectional Technologies | 28 | Expired |
| US6480815B1 | Path dependent power modeling | Physics | 25 | Expired |
| US5838579A | State dependent power modeling | Physics | 25 | Expired |
| US5949689A | Path dependent power modeling | Physics | 22 | Expired |
| US6195630A | Three-dimensional power modeling table having dual output capacitance indices | Emerging Cross-Sectional Technologies | 15 | Expired |
| US10372858B2 | Design-for-testability (DFT) insertion at register-transfer-level (RTL) | Physics | 6 | Active |
| US9652573B1 | Creating and using a wide-gate data structure to represent a wide-gate in an integrated circuit (IC) design | Physics | 5 | Active |
| US9697314B1 | Identifying and using slices in an integrated circuit (IC) design | Physics | 5 | Active |
| US9690890B1 | Creating and using a wide-bus data structure to represent a wide-bus in an integrated circuit (IC) design | Physics | 4 | Active |
| US10354032B2 | Optimizing an integrated circuit (IC) design comprising at least one wide-gate or wide-bus | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.