Jonathan Redshaw
55Patents
5h-index
49Co-inventors
72Inventor score
Filing activity: Aug 6, 2001 → Jun 10, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6798410B1 | Shading 3-dimensional computer generated images | Physics | 69 | Expired |
| US8669987B2 | Memory management for systems for generating 3-dimensional computer images | Physics | 13 | Active |
| US8743117B2 | Processing of 3D computer graphics data on multiple shading engines | Physics | 6 | Active |
| US8723860B2 | Methods and systems for generating 3-dimensional computer images | Physics | 5 | Active |
| US7362328B2 | Interface and method of interfacing between a parametric modelling unit and a polygon based rendering system | Physics | 5 | Active |
| US10255653B2 | Task assembly for SIMD processing | Physics | 4 | Active |
| US9747660B2 | Primitive processing in a graphics processing system with tag buffer storage of primitive identifiers | Physics | 4 | Active |
| US10249085B2 | Graphics processing method and system for processing sub-primitives using sub-primitive indications in a control stream | Physics | 4 | Active |
| US10210649B2 | Graphics processing method and system for processing sub-primitives using cached graphics data hierarchy | Physics | 3 | Active |
| US8836710B2 | Memory management system and method | Physics | 3 | Active |
| US10529123B2 | Primitive processing in a graphics processing system | Physics | 2 | Active |
| US9250961B2 | Task execution in a SIMD processing unit | Physics | 2 | Active |
| US10210596B2 | Primitive processing in a graphics processing system with tag buffer storage of primitive identifiers | Physics | 2 | Active |
| US10055877B2 | Allocation of tiles to processing engines in a graphics processing system | Physics | 2 | Active |
| US10957097B2 | Allocation of primitives to primitive blocks | Physics | 1 | Active |
| US7227546B2 | Interface and method of interfacing between a parametric modelling unit and a polygon based rendering system | Physics | 1 | Expired |
| US10755383B2 | Multi-space rendering with configurable transformation parameters | Emerging Cross-Sectional Technologies | 1 | Active |
| US11341601B2 | Task assembly for SIMD processing | Physics | 1 | Active |
| US9830738B2 | Primitive processing in a graphics processing system | Physics | 1 | Active |
| US11847489B2 | United states graphics processor techniques with split between workload distribution control data on shared control bus and corresponding graphics data on memory interfaces | Physics | 1 | Active |
| US10817973B2 | Task assembly for SIMD processing | Physics | 1 | Active |
| US11675722B2 | Multiple independent on-chip interconnect | Emerging Cross-Sectional Technologies | 1 | Active |
| US12182037B2 | Cache control to preserve register data | Physics | 0 | Active |
| US12321681B2 | Full die and partial die tape outs from common design | Physics | 0 | Active |
| US10679322B2 | Primitive processing in a graphics processing system with tag buffer storage of primitive identifiers | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.