Jong Chol Kim
10Patents
2h-index
16Co-inventors
51Inventor score
Filing activity: Nov 15, 1994 → Aug 6, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5441904A | Method for forming a two-layered polysilicon gate electrode in a semiconductor device using grain boundaries | Electricity | 71 | Expired |
| US10217816B2 | Semiconductor device | Electricity | 13 | Active |
| US10311187B2 | Circuit design method and simulation method based on random telegraph signal noise | Physics | 1 | Active |
| US10504894B2 | Semiconductor device | Electricity | 0 | Active |
| US11581311B2 | Semiconductor device | Electricity | 0 | Active |
| US10840332B2 | Semiconductor device | Electricity | 0 | Active |
| US11876097B2 | Semiconductor device | Electricity | 0 | Active |
| US10714473B2 | Semiconductor device | Electricity | 0 | Active |
| US11515391B2 | Semiconductor device | Electricity | 0 | Active |
| US11133311B2 | Semiconductor device | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.