Kensuke Ishikawa
22Patents
5h-index
29Co-inventors
69Inventor score
Filing activity: Oct 4, 2002 → Oct 25, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6838772B2 | Semiconductor device | Electricity | 26 | Expired |
| US10115735B2 | Semiconductor device containing multilayer titanium nitride diffusion barrier and method of making thereof | Electricity | 24 | Active |
| US7323781B2 | Semiconductor device and manufacturing method thereof | Electricity | 22 | Expired |
| US7459786B2 | Semiconductor device | Electricity | 8 | Expired |
| US9064870B2 | Semiconductor device and manufacturing method thereof | Electricity | 6 | Active |
| US8053893B2 | Semiconductor device and manufacturing method thereof | Electricity | 5 | Active |
| US8617981B2 | Semiconductor device and manufacturing method thereof | Electricity | 4 | Active |
| US8431480B2 | Semiconductor device and manufacturing method thereof | Electricity | 4 | Active |
| US7777343B2 | Semiconductor device and manufacturing method thereof | Electricity | 2 | Active |
| US9659867B2 | Semiconductor device and manufacturing method thereof | Electricity | 2 | Active |
| US7777346B2 | Semiconductor integrated circuit device and a method of manufacturing the same | Electricity | 1 | Active |
| US11935784B2 | Three-dimensional memory device containing self-aligned bit line contacts and methods for forming the same | Electricity | 1 | Active |
| US9779312B2 | Environment recognition system | Physics | 1 | Active |
| US7018919B2 | Method of manufacturing a semiconductor integrated circuit device including a hole formed in an insulating film and a first conductive film formed over a bottom region and sidewalls of the hole | Electricity | 1 | Expired |
| US8810034B2 | Semiconductor device and manufacturing method thereof | Electricity | 1 | Active |
| US7569476B2 | Semiconductor integrated circuit device and a method of manufacturing the same | Electricity | 0 | Active |
| US9490213B2 | Semiconductor device and manufacturing method thereof | Electricity | 0 | Active |
| US12087626B2 | High aspect ratio via fill process employing selective metal deposition and structures formed by the same | Electricity | 0 | Active |
| US10121693B2 | Semiconductor device and manufacturing method thereof | Electricity | 0 | Active |
| US10304726B2 | Semiconductor device and manufacturing method thereof | Electricity | 0 | Active |
| US7095120B2 | Semiconductor integrated circuit device with a connective portion for multilevel interconnection | Electricity | 0 | Expired |
| US9818639B2 | Semiconductor device and manufacturing method thereof | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.