Mark D. Mayo
4Patents
2h-index
15Co-inventors
45Inventor score
Filing activity: Oct 11, 1989 → May 28, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4967151A | Method and apparatus for detecting faults in differential current switching logic circuits | Physics | 14 | Expired |
| US8954915B2 | Structured placement of hierarchical soft blocks during physical synthesis of an integrated circuit | Physics | 5 | Active |
| US7908308B2 | Carry-select adder structure and method to generate orthogonal signal levels | Physics | 2 | Active |
| US7676779B2 | Logic block timing estimation using conesize | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.