Michael Cole
7Patents
3h-index
18Co-inventors
54Inventor score
Filing activity: Mar 29, 1996 → Dec 16, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6125425A | Memory controller performing a mid transaction refresh and handling a suspend signal | Electricity | 13 | Expired |
| US5901298A | Method for utilizing a single multiplex address bus between DRAM, SRAM and ROM | Physics | 11 | Expired |
| US8079031B2 | Method, apparatus, and a system for dynamically configuring a prefetcher based on a thread specific latency metric | Physics | 4 | Active |
| US9053244B2 | Utilization-aware low-overhead link-width modulation for power reduction in interconnects | Emerging Cross-Sectional Technologies | 0 | Active |
| US9336175B2 | Utilization-aware low-overhead link-width modulation for power reduction in interconnects | Emerging Cross-Sectional Technologies | 0 | Active |
| US12367063B2 | Technology to measure latency in hardware with fine-grained transactional filtration | Physics | 0 | Active |
| US11210094B2 | Method and apparatus for minimally intrusive instruction pointer-aware processing resource activity profiling | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.