Inventor · Manhattan Beach, CA, US

Mike Jadon

60Patents
20h-index
8Co-inventors
81Inventor score

Filing activity: Apr 14, 2004 → Apr 2, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US9400749B1 Host interleaved erase operations for flash memory controller Physics 172 Active
US10552058B1 Techniques for delegating data processing to a cooperative memory controller Physics 113 Active
US9542118B1 Expositive flash memory control Physics 105 Active
US9727454B2 Memory controller that provides addresses to host for memory location matching state tracked by memory controller Physics 94 Active
US9652376B2 Cooperative flash memory control Physics 83 Active
US9785572B1 Memory controller with multimodal control over memory dies Physics 77 Active
US9588904B1 Host apparatus to independently schedule maintenance operations for respective virtual block devices in the flash memory dependent on information received from a memory controller Physics 73 Active
US11586385B1 Techniques for managing writes in nonvolatile memory Physics 42 Active
US11175984B1 Erasure coding techniques for flash memory Physics 42 Active
US10838853B1 Nonvolatile memory controller that defers maintenance to host-commanded window Physics 33 Active
US11003586B1 Zones in nonvolatile or persistent memory with configured write parameters Physics 25 Active
US11023315B1 Techniques for supporting erasure coding with flash memory controller Physics 24 Active
US10642748B1 Memory controller for flash memory with zones configured on die bounaries and with separate spare management per zone Physics 23 Active
US11100006B1 Host-commanded garbage collection based on different per-zone thresholds and candidates selected by memory controller Physics 23 Active
US11048643B1 Nonvolatile memory controller enabling wear leveling to independent zones or isolated regions Physics 23 Active
US10977188B1 Idealized nonvolatile or persistent memory based upon hierarchical address translation Physics 22 Active
US10884915B1 Flash memory controller to perform delegated move to host-specified destination Physics 22 Active
US11074175B1 Flash memory controller which assigns address and sends assigned address to host in connection with data write requests for use in issuing later read requests for the data Physics 21 Active
US11221959B1 Nonvolatile memory controller supporting variable configurability and forward compatibility Physics 21 Active
US10915458B1 Configuration of isolated regions or zones based upon underlying memory geometry Physics 21 Active
US11023387B1 Nonvolatile/persistent memory with namespaces configured across channels and/or dies Physics 20 Active
US11221961B1 Configuration of nonvolatile memory as virtual devices with user defined parameters Physics 20 Active
US11023386B1 Nonvolatile memory controller with configurable address assignment parameters per namespace Physics 20 Active
US11080181B1 Flash memory drive that supports export of erasable segments Physics 20 Active
US11086789B1 Flash memory drive with erasable segments based upon hierarchical addressing Physics 19 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.