Inventor · Mount Kisco, NY, US

Mohit Kapur

25Patents
5h-index
29Co-inventors
69Inventor score

Filing activity: Aug 28, 2003 → Apr 12, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US10298545B2 Secure processing environment for protecting sensitive information Electricity 14 Active
US7509568B2 Error type identification circuit for identifying different types of errors in communications devices Physics 11 Active
US9230046B2 Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator Physics 10 Active
US10705556B2 Phase continuous signal generation using direct digital synthesis Physics 10 Active
US7724059B2 Clock scaling circuit Physics 8 Active
US9002693B2 Wire like link for cycle reproducible and cycle accurate hardware accelerator Physics 4 Active
US9286423B2 Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator Physics 2 Active
US11093674B2 Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator Physics 2 Active
US7412640B2 Self-synchronizing pseudorandom bit sequence checker Electricity 2 Expired
US8737233B2 Increasing throughput of multiplexed electrical bus in pipe-lined architecture Electricity 2 Active
US8640070B2 Method and infrastructure for cycle-reproducible simulation on large scale digital circuits on a coordinated set of field-programmable gate arrays (FPGAs) Electricity 2 Active
US10176281B2 Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator Physics 1 Active
US10628579B2 System and method for supporting secure objects using a memory access control monitor Physics 1 Active
US10523640B2 Secure processing environment for protecting sensitive information Electricity 0 Active
US11907361B2 System and method for supporting secure objects using a memory access control monitor Physics 0 Active
US11047907B2 Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator Physics 0 Active
US12287829B2 Minimizing hash collisions of composite keys Physics 0 Active
US10904226B2 Secure processing environment for protecting sensitive information Electricity 0 Active
US12061521B1 Non-blocking hardware function request retries to address response latency variabilities Physics 0 Active
US7177775B2 Testable digital delay line Electricity 0 Expired
US10547596B2 Secure processing environment for protecting sensitive information Electricity 0 Active
US10924193B2 Transmit and receive radio frequency (RF) signals without the use of baseband generators and local oscillators for up conversion and down conversion Electricity 0 Active
US10158607B2 Secure processing environment for protecting sensitive information Electricity 0 Active
US10488460B2 Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator Physics 0 Active
US7757142B2 Self-synchronizing pseudorandom bit sequence checker Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.