Razvan Peter Figuli
15Patents
1h-index
25Co-inventors
43Inventor score
Filing activity: Apr 20, 2018 → Mar 24, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10169451B1 | Rapid character substring searching | Electricity | 9 | Active |
| US10747819B2 | Rapid partial substring matching | Physics | 1 | Active |
| US11663270B2 | Vector string search instruction | Physics | 0 | Active |
| US11099602B2 | Fault-tolerant clock gating | Electricity | 0 | Active |
| US10732972B2 | Non-overlapping substring detection within a data element string | Physics | 0 | Active |
| US12399743B2 | Padding input data for artificial intelligence accelerators | Physics | 0 | Active |
| US11782683B1 | Variable replacement by an artificial intelligence accelerator | Physics | 0 | Active |
| US11068541B2 | Vector string search instruction | Physics | 0 | Active |
| US10782968B2 | Rapid substring detection within a data element string | Physics | 0 | Active |
| US11159183B2 | Residue checking of entire normalizer output of an extended result | Physics | 0 | Active |
| US11042371B2 | Plausability-driven fault detection in result logic and condition codes for fast exact substring match | Physics | 0 | Active |
| US11221826B2 | Parallel rounding for conversion from binary floating point to binary coded decimal | Electricity | 0 | Active |
| US10996951B2 | Plausibility-driven fault detection in string termination logic for fast exact substring match | Physics | 0 | Active |
| US10831496B2 | Method to execute successive dependent instructions from an instruction stream in a processor | Physics | 0 | Active |
| US11210064B2 | Parallelized rounding for decimal floating point to binary coded decimal conversion | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.