Robert Hathaway
16Patents
8h-index
28Co-inventors
72Inventor score
Filing activity: Apr 30, 1998 → Feb 15, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7398449B1 | Encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use on a 76-bit memory module | Physics | 25 | Active |
| US7225300B1 | Duplicate snoop tags partitioned across multiple processor/cache chips in a multi-processor system | Physics | 21 | Expired |
| US8099651B2 | Subsystem and method for encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use in a 76-bit memory module | Physics | 18 | Active |
| US8051227B1 | Programmable queue structures for multiprocessors | Physics | 18 | Active |
| US7366847B2 | Distributed cache coherence at scalable requestor filter pipes that accumulate invalidation acknowledgements from other requestor filter pipes using ordering messages from central snoop tag | Physics | 17 | Active |
| US6105128A | Method and apparatus for dispatching instructions to execution units in waves | Physics | 10 | Expired |
| US5978898A | Allocating registers in a superscalar machine | Physics | 8 | Expired |
| US8656139B2 | Digital processor for processing long and short pointers and converting each between a common format | Physics | 8 | Active |
| US8914581B2 | Method and apparatus for accessing cache memory | Physics | 5 | Active |
| US8402248B2 | Explicitly regioned memory organization in a network element | Emerging Cross-Sectional Technologies | 3 | Active |
| US9311148B2 | Pseudo-random hardware resource allocation through the plurality of resource controller based on non-repeating sequence of index list entries | Physics | 1 | Active |
| US10747457B2 | Technologies for processing network packets in agent-mesh architectures | Electricity | 0 | Active |
| US8700874B2 | Digital counter segmented into short and long access time memory | Electricity | 0 | Active |
| US9419911B2 | Method and system for packet job scheduler in data processing based on workload self-learning | Emerging Cross-Sectional Technologies | 0 | Active |
| US9317289B2 | Acknowledgement forwarding | Electricity | 0 | Active |
| US12160369B2 | Processor related communications | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.