Roman Staszewski
12Patents
6h-index
10Co-inventors
63Inventor score
Filing activity: Mar 21, 1995 → Sep 9, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8321489B2 | Software reconfigurable digital phase lock loop architecture | Electricity | 23 | Active |
| US8065506B2 | Application specific instruction set processor for digital radio processor receiving chain signal processing | Physics | 11 | Active |
| US5566110A | Electrically erasable programmable read only memory and method of operation | Physics | 11 | Expired |
| US8134411B2 | Computation spreading utilizing dithering for spur reduction in a digital phase lock loop | Electricity | 9 | Active |
| US8306174B2 | Fractional interpolative timing advance and retard control in a transceiver | Electricity | 7 | Active |
| US9853649B2 | Phase domain calculator clock, ALU, memory, register file, sequencer, latches | Electricity | 7 | Active |
| US9116769B2 | ASIP with reconfigurable circuitry implementing atomic operations of a PLL | Electricity | 6 | Active |
| US9473155B2 | Software reconfigurable digital phase lock loop architecture | Electricity | 6 | Active |
| US7936221B2 | Computation spreading for spur reduction in a digital phase lock loop | Electricity | 5 | Active |
| US7809927B2 | Computation parallelization in software reconfigurable all digital phase lock loop | Electricity | 4 | Active |
| US10122371B2 | Reconfigurable calculation unit with atomic computation units and control inputs | Electricity | 2 | Active |
| US10911056B2 | IC transmitter digital phase domain calculator with atomic computation units | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.