Sameer Kp
31Patents
3h-index
49Co-inventors
59Inventor score
Filing activity: Dec 19, 2012 → Nov 22, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10380039B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 17 | Active |
| US11650658B2 | Compensating for high head movement in head-mounted displays | Physics | 6 | Active |
| US10109078B1 | Controlling coarse pixel size from a stencil buffer | Physics | 4 | Active |
| US10649521B2 | Compensating for high head movement in head-mounted displays | Physics | 3 | Active |
| US10878614B2 | Motion biased foveated renderer | Physics | 3 | Active |
| US10643374B2 | Positional only shading pipeline (POSH) geometry data processing with coarse Z buffer | Physics | 3 | Active |
| US11619987B2 | Compensating for high head movement in head-mounted displays | Physics | 2 | Active |
| US11237626B2 | Compensating for high head movement in head-mounted displays | Physics | 2 | Active |
| US10706591B2 | Controlling coarse pixel size from a stencil buffer | Physics | 1 | Active |
| US9530386B2 | Methods and apparatus to provide extended graphics processing capabilities | Physics | 1 | Active |
| US11869119B2 | Controlling coarse pixel size from a stencil buffer | Physics | 1 | Active |
| US10152822B2 | Motion biased foveated renderer | Physics | 1 | Active |
| US9600055B2 | Intelligent power management for a multi-display mode enabled electronic device | Emerging Cross-Sectional Technologies | 1 | Active |
| US10769078B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 1 | Active |
| US10134360B2 | Compressing the size of color lookup tables | Physics | 1 | Active |
| US11360914B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 1 | Active |
| US11354848B1 | Motion biased foveated renderer | Physics | 1 | Active |
| US10453430B2 | Methods and apparatus to provide extended graphics processing capabilities | Physics | 0 | Active |
| US11348511B2 | Enabling a chipset that supports a single display to support dual display | Physics | 0 | Active |
| US12265439B2 | Co-existence of full frame and partial frame idle image updates | Emerging Cross-Sectional Technologies | 0 | Active |
| US11244479B2 | Controlling coarse pixel size from a stencil buffer | Physics | 0 | Active |
| US11768781B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 0 | Active |
| US10453429B2 | Methods and apparatus to provide extended graphics processing capabilities | Physics | 0 | Active |
| US10497340B2 | Beam scanning image processing within an improved graphics processor microarchitecture | Physics | 0 | Active |
| US12299189B2 | Compensating for high head movement in head-mounted displays | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.