Apparatus and method for memory management in a graphics processing environment

US11768781B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Niranjan L. Cooray · Folsom, US
• Abhishek R. Appu · Cameron Park, US
• Altug Koker · Cameron Park, US
• Joydeep Ray · Folsom, US
• Balaji Vembu · Folsom, US
• Pattabhiraman K · Bengaluru, IN
• David Puffer · Tempe, US
• David J. Cowperthwaite · Portland, US
• Rajesh M. Sankaran · Portland, US
• Satyeshwar Singh · Mather, US
• Sameer Kp · Bengaluru, IN
• Ankur N. Shah · Folsom, US
• Kun Tian · Shanghai, CN

Key dates

• Filing date: May 27, 2022
• Grant date: Sep 26, 2023
• Expiry date: May 27, 2042

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/68
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An apparatus and method are described for implementing memory management in a graphics processing system. For example, one embodiment of an apparatus comprises: a first plurality of graphics processing resources to execute graphics commands and process graphics data; a first memory management unit (MMU) to communicatively couple the first plurality of graphics processing resources to a system-level MMU to access a system memory; a second plurality of graphics processing resources to execute graphics commands and process graphics data; a second MMU to communicatively couple the second plurality of graphics processing resources to the first MMU; wherein the first MMU is configured as a master MMU having a direct connection to the system-level MMU and the second MMU comprises a slave MMU configured to send memory transactions to the first MMU, the first MMU either servicing a memory transaction or sending the memory transaction to the system-level MMU on behalf of the second MMU.