Simon Nield
29Patents
2h-index
7Co-inventors
42Inventor score
Filing activity: Sep 25, 2017 → Feb 12, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10884797B2 | Scheduling tasks using targeted pipelines | Physics | 8 | Active |
| US11366691B2 | Scheduling tasks using targeted pipelines | Physics | 4 | Active |
| US11200064B2 | Methods and systems for inter-pipeline data hazard avoidance | Physics | 2 | Active |
| US10318348B2 | Task scheduling in a GPU | Emerging Cross-Sectional Technologies | 2 | Active |
| US10503547B2 | Task scheduling in a GPU | Emerging Cross-Sectional Technologies | 2 | Active |
| US10817301B2 | Methods and systems for inter-pipeline data hazard avoidance | Physics | 2 | Active |
| US11698790B2 | Queues for inter-pipeline data hazard avoidance | Physics | 1 | Active |
| US11204800B2 | Task scheduling in a GPU using wakeup event state data | Emerging Cross-Sectional Technologies | 1 | Active |
| US11900122B2 | Methods and systems for inter-pipeline data hazard avoidance | Physics | 1 | Active |
| US12405802B2 | Methods and systems for inter-pipeline data hazard avoidance | Physics | 0 | Active |
| US11429389B2 | Data selection for a processor pipeline using multiple supply lines | Physics | 0 | Active |
| US10990448B2 | Allocation of memory resources to SIMD workgroups | Emerging Cross-Sectional Technologies | 0 | Active |
| US10579381B2 | Encoding and decoding variable length instructions | Physics | 0 | Active |
| US11868775B2 | Encoding and decoding variable length instructions | Physics | 0 | Active |
| US11531545B2 | Scheduling tasks using swap flags | Physics | 0 | Active |
| US12367046B2 | Scheduling tasks using swap flags | Physics | 0 | Active |
| US11868807B2 | Scheduling tasks using work fullness counter | Physics | 0 | Active |
| US11249925B2 | Sorting memory address requests for parallel memory access using input address match masks | Physics | 0 | Active |
| US10628341B2 | Sorting memory address requests for parallel memory access | Physics | 0 | Active |
| US12298924B2 | Sorting memory address requests for parallel memory access using input address match masks | Physics | 0 | Active |
| US11656908B2 | Allocation of memory resources to SIMD workgroups | Emerging Cross-Sectional Technologies | 0 | Active |
| US11720399B2 | Task scheduling in a GPU using wakeup event state data | Emerging Cross-Sectional Technologies | 0 | Active |
| US12020067B2 | Scheduling tasks using targeted pipelines | Physics | 0 | Active |
| US10877760B2 | Selection of data for processor pipelines using multiple supply lines wherein in one of two modes the same data is supplied to both inputs of a processing element | Physics | 0 | Active |
| US10884743B2 | Scheduling tasks using swap flags | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.