Tanuj KUMAR
4Patents
0h-index
10Co-inventors
31Inventor score
Filing activity: Sep 23, 2019 → Oct 12, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11393532B2 | Circuit and method for at speed detection of a word line fault condition in a memory circuit | Physics | 0 | Active |
| US12170120B2 | Built-in self test circuit for segmented static random access memory (SRAM) array input/output | Physics | 0 | Active |
| US11025252B2 | Circuit for detection of single bit upsets in generation of internal clock for memory | Electricity | 0 | Active |
| US12353341B2 | Tuning of read/write cycle time delay for a memory circuit dependent on operational mode selection | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.