Viswanath Mohan
4Patents
1h-index
4Co-inventors
33Inventor score
Filing activity: Nov 26, 2014 → Feb 17, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9842055B2 | Address translation cache that supports simultaneous invalidation of common context entries | Physics | 12 | Active |
| US10078597B2 | System and method of distinguishing system management mode entries in a translation address cache of a processor | Physics | 0 | Active |
| US12367032B1 | Hot loadable programmable state machine | Physics | 0 | Active |
| US9727480B2 | Efficient address translation caching in a processor that supports a large number of different address spaces | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.