Inventor · San Jose, CA, US

Yan Wang

10Patents
3h-index
25Co-inventors
56Inventor score

Filing activity: Mar 13, 2007 → May 11, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7765498B1 Methods of incorporating process-induced layout dimension changes into an integrated circuit simulation netlist Physics 9 Active
US8581770B2 Zero-power sampling SAR ADC circuit and method Electricity 9 Active
US7673270B1 Method and apparatus for compensating an integrated circuit layout for mechanical stress effects Physics 4 Active
US8266553B1 System and method for detecting mask data handling errors Physics 3 Active
US10830858B2 Correcting time Physics 1 Active
US11681542B2 Integrating virtualization and host networking Physics 1 Active
US8360788B2 Freely rotatable electrical conduction structure and receptacle using the same Electricity 1 Active
US12277436B2 Integrating virtualization and host networking Physics 0 Active
US11928875B2 Layout-aware, scalable recognition system Physics 0 Active
US11973136B2 Flexible microwave power transistor and preparation method thereof Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.