Yang Jiao
40Patents
7h-index
79Co-inventors
72Inventor score
Filing activity: Sep 25, 2003 → Mar 8, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9804666B2 | Warp clustering | Emerging Cross-Sectional Technologies | 54 | Active |
| US8049760B2 | System and method for vector computations in arithmetic logic units (ALUs) | Physics | 34 | Active |
| US8174534B2 | Shader processing systems and methods | Physics | 15 | Active |
| US8144149B2 | System and method for dynamically load balancing multiple shader stages in a shared pool of processing units | Physics | 12 | Active |
| US8120608B2 | Constant buffering for a computational core of a programmable graphics processing unit | Physics | 10 | Active |
| US7454599B2 | Selecting multiple threads for substantially concurrent processing | Physics | 10 | Active |
| US8499305B2 | Systems and methods for performing multi-program general purpose shader kickoff | Physics | 9 | Active |
| US11025172B2 | Three-level modulation for wide output voltage range isolated DC/DC converters | Emerging Cross-Sectional Technologies | 6 | Active |
| USD956562S1 | Lid for packaging container | General | 5 | Active |
| US8547385B2 | Systems and methods for performing shared memory accesses | Physics | 5 | Active |
| US7164430B2 | Anti-aliasing line pixel coverage calculation using programmable shader | Physics | 5 | Expired |
| US10396684B2 | Coupled inductor for interleaved multi-phase three-level DC-DC converters | Electricity | 5 | Active |
| US8681162B2 | Systems and methods for video processing | Electricity | 5 | Active |
| US8564604B2 | Systems and methods for improving throughput of a graphics processing unit | Physics | 4 | Active |
| USD956561S1 | Lid for packaging container | General | 4 | Active |
| US8319774B2 | Constant buffering for a computational core of a programmable graphics processing unit | Physics | 1 | Active |
| US11768911B2 | Method and apparatus for execution of neural network | Physics | 1 | Active |
| US9190920B2 | H-bridge micro inverter grid-connected device | Emerging Cross-Sectional Technologies | 1 | Active |
| US12169457B2 | Electronic device and method for co-operating software and hardware | Physics | 0 | Active |
| USD1011203S1 | Lid for packaging container | General | 0 | Active |
| US11520640B2 | Efficient and more advanced implementation of ring-AllReduce algorithm for distributed parallel deep learning | Physics | 0 | Active |
| US9727341B2 | Control flow in a thread-based environment without branching | Physics | 0 | Active |
| US7286139B2 | Partial guardband clipping | Physics | 0 | Expired |
| US7876328B2 | Managing multiple contexts in a decentralized graphics processing unit | Physics | 0 | Active |
| US11922219B2 | Efficient inter-chip interconnect topology for distributed parallel deep learning | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.