Zuo Dai
13Patents
6h-index
13Co-inventors
59Inventor score
Filing activity: Dec 3, 2010 → May 18, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8677297B2 | Low-overhead multi-patterning design rule check | Physics | 26 | Active |
| US8843867B2 | Low-overhead multi-patterning design rule check | Physics | 11 | Active |
| US8448097B2 | High performance DRC checking algorithm for derived layer based rules | Physics | 11 | Active |
| US8453103B2 | Real time DRC assistance for manual layout editing | Physics | 10 | Active |
| US8352887B2 | High performance design rule checking technique | Physics | 9 | Active |
| US9009632B2 | High performance design rule checking technique | Physics | 6 | Active |
| US8799835B2 | Real time DRC assistance for manual layout editing | Physics | 4 | Active |
| US8719738B2 | High performance design rule checking technique | Physics | 2 | Active |
| US8661377B2 | Real time DRC assistance for manual layout editing | Physics | 1 | Active |
| US10318684B2 | Network flow based framework for clock tree optimization | Physics | 1 | Active |
| US12147748B2 | System for making circuit design changes | Physics | 0 | Active |
| US8713486B2 | High performance design rule checking technique | Physics | 0 | Active |
| US12307187B2 | Circuit design having an improved clock tree | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.