Patent · US Active

Adaptive temperature and memory parameter throttling

US10007311B2 · kind B2 · utility

10Cited by
1References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 15, 2016
Grant dateJun 26, 2018
Priority date
Expiry dateAug 15, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A storage device with a memory may modify throttling to reduce cross temperature effects. The decision to throttle may be based on a memory device temperature (i.e. temperature throttling) or may be based on the memory device's health, usage, or performance (e.g. hot count or bit error rate). Temperature throttling may be implemented that considers the memory device's health, usage, or performance (e.g. hot count or bit error rate). Likewise, throttling based on the memory device's health, usage, or performance may utilize the memory device's temperature to optimize throttling time. For example, a test mode matrix (TMM) may be modified to depend on temperature.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.